This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-074782 filed on Mar. 15, 2000, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor integrated circuit and a technique of extracting parameters of a circuit element model used for a circuit simulation in designing a semiconductor integrated circuit.
2. Description of the Related Art
Semiconductor integrated circuits, in particular, LSIs such as high-frequency analog circuits, analog-digital circuits, and high-speed digital circuits involve fine patterns made by, for example, photolithography on semiconductor substrates. Testing these circuits requires a lot of time and money if they must actually be produced for the testing. To minimize testing time and cost, simulations are carried out to confirm the physical and electrical behaviors of the circuits and the circuit elements employed in the circuits before manufacturing. Simulations involved in the designing and development of a semiconductor integrated circuit include a process simulation to simulate the manufacturing processes, impurity/defect profiles, and geometries of circuit elements (or the devices); a device simulation to simulate the device behaviors of the circuit elements; and a circuit simulation to simulate the circuit performance.
The process simulation is carried out based on the conditions of each process and finds the impurity distributions and structures of semiconductor elements formed by the process. Based on the data provided by the process simulation, the device simulation is carried out to find the device behaviors of the semiconductor devices. Based on the data provided by the process and device simulations, the circuit simulation is carried out to find the circuit performance, or the electric characteristics of the semiconductor integrated circuit.
The circuit simulation employs a circuit element model representing the electric characteristics of a semiconductor element of a target integrated circuit, and based on the circuit element model, calculates potential levels and current values to occur at nodes of the integrated circuit. The circuit element model consists of numerical expressions representing the operation principles of the element and parameter values determined from manufacturing conditions. An operation to determine parameter values of a circuit element model according to electric characteristics measured on actual semiconductor elements is called xe2x80x9cparameter extraction.xe2x80x9d Correctly carrying out parameter extraction is important to provide an accurate circuit element model and secure the reliability of a circuit simulation.
For example, parameter extraction of a circuit element model of, for example, a MOSFET frequently employs an optimization technique. The optimization technique employs a nonlinear optimization algorithm such as a Newton-Raphson method to determine parameter values of the circuit element model. The optimization technique is easily applied to any circuit element model. However, it has a disadvantage of involving local solutions of poor accuracy when handling many parameters. To overcome this disadvantage, a local optimization technique is employed to extract parameters of a circuit element model such as a BSIM3 model involving many parameters.
Parameter extraction according to a related art employing the local optimization technique will be explained with reference to FIG. 1.
Step S201 measures the electric characteristics of actual semiconductor elements according to various bias conditions and element dimensions. Step S202 classifies the measured electric characteristics according to the bias conditions and element dimensions. Step S203 selects sensitive parameters related to the classified electric characteristics. Step S204 carries out local optimization operations to narrow down and determine values of the selected parameters according to the classified electric characteristics. Step S205 checks to see if the determined parameter values can sufficiently reproduce the actually measured electric characteristics. If the determination in step S205 is affirmative, step S207 provides the determined parameter values as the parameter values of the circuit element model. If the determination in step S205 is negative, step S206 carries out a global optimization operation to determine parameter values. Instead of step S206, step S204 may again be carried out to determine parameter values.
Parameter extraction employing the local optimization technique will be explained in more detail with reference to a BSIM3 model.
The BSIM3 model expresses a MOSFET and includes parameters that are effective only when the channel length L of the MOSFET is short and the parameters are independent of the channel length L. For example, a partial expression P to calculate a threshold voltage of the MOSFET is as follows:
P=P0+P1/Lxe2x80x83xe2x80x83(1)
where P0 and P1 are parameters. If the channel length L of the MOSFET is sufficiently larger than the parameter P1, the influence of P1 is small and P is nearly equal to P0. In this case, electric characteristics actually measured on MOSFETs having sufficiently long channel lengths are effective in narrowing down the parameter P0. Thereafter, the parameter P1 is narrowed down from electric characteristics actually measured on MOSFETs having short channel lengths.
In this way, the parameter extraction employing the local optimization technique considers only a small number of sensitive parameters in each step, thus overcoming the disadvantage of the nonlinear optimization algorithm.
It is ideal for the local optimization technique that the sensitivity of any parameter that is not extracted in a given step and is to be extracted later is reduced to zero, realizing a perfectly localized state in the given step. In practice, however, it is difficult to realize a perfectly localized state. In the above example, a value of the parameter P0 extracted first will greatly deviate from a true value depending on the value of the parameter P1 extracted later, even if the channel length L is greatly extended.
As a result, each parameter extraction step of the local optimization technique involves calculation noise caused by parameters that are not determined in the step. Such calculation noise accumulates, enlarging the error step by step, and gradually deteriorating the accuracy of the parameter values determined. In the above example, absorbing error in the parameter P0 using a parameter P1 with short channel lengths increases errors with respect to large channel lengths.
Parameter extraction employing the local optimization technique, therefore, frequently requires global optimization and repetitive calculations.
Global optimization and repetitive calculations usually involve solution divergence and poor local solutions, and therefore, are incapable of correctly extracting parameters of a circuit element model or securing unique parameter values. FIG. 2 is a graph showing a drain voltage vs drain current characteristic of a MOSFET involving such inaccurate solutions. This graph shows that electric characteristics provided by a circuit simulation based on inaccurate local solutions greatly deviate from actually measured electric characteristics.
Extraction accuracy of the parameters of a circuit element model seriously influences the semiconductor development stage of determining manufacturing conditions and designing a circuit. To reduce the cost and time of product development and improve the efficiency thereof, it is necessary to provide a technique of correctly extracting parameters of a circuit element model.
According to a first aspect of the present invention, an apparatus for extracting parameters of a circuit element model that represents a semiconductor element used for a circuit simulation has a specifying unit configured to specify an element structure and a physical model in the semiconductor element; a simulation unit configured to carry out local process and device simulations for parameters related to the specified element structure and physical model and calculate separately electric characteristics of the specified element structures respectively; and a classification unit configured to classify the calculated electric characteristics according to bias conditions and element dimensions used in the local process and device simulations.
According to a second aspect of the present invention, a circuit designing system has a calculating unit for carrying out local process and device simulations for parameters related to an element structure and a physical model, the element structures and physical models being specified in a semiconductor element; for calculating separately electric characteristics of the specified element structures; and for classifying the calculated electric characteristics according to bias conditions and element dimensions used in the local process and device simulations.
According to a third aspect of the present invention, a method of extracting parameters of a circuit element model, the circuit element model representing a semiconductor element used for a circuit simulation, includes a) carrying out local process and device simulations for parameters related to an element structure and a physical model in order to calculate separately electric characteristics of the element structures, the element structure and physical model being specified in the semiconductor element; b) classifying the calculated electric characteristics according to bias conditions and element dimensions used in the local process and device simulations; and c) determining values of the parameters of the circuit element model in a step-by-step manner according to the classified electric characteristics serving as targets.
According to a fourth aspect of the present invention, a method of manufacturing a semiconductor integrated circuit includes a) carrying out a rough process simulation for a semiconductor element to be included in the semiconductor integrated circuit, in order to provide process conditions and element structures of the semiconductor element; b) carrying out a rough device simulation according to the provided process conditions and element structures, in order to provide rough electric characteristics of the semiconductor element; c) specifying elements structures and physical models in the semiconductor elements; d) carrying out local process and device simulations for parameters relating to the specified element structures and physical models to calculate electric characteristics of the specified element structures; e) determining parameter the values of a circuit element model representing the semiconductor element in a step-by-step manner; f) carrying out a circuit simulation according to the determined parameter value so as to provide circuit performance, and g) evaluating the circuit performance.
According to a sixth aspect of the present invention, a computer executable program for extracting parameters used for a circuit simulation includes a) specifying an element structure and a physical model in the semiconductor element; b) carrying out local process and device simulations for parameters related to the specified element structure and physical model in order to calculate separately electric characteristics of the specified element structure; c) classifying the calculated electric characteristics according to bias conditions and element dimensions used in the local process and device simulations; d) determining values of the parameters of the circuit element model in a step-by-step manner according to the classified electric characteristics serving as targets; e) extracting physical quantities of the semiconductor element according to the results of the local process and device simulations; f) calculating initial values of the parameters of the circuit element model according to the extracted physical quantities; and g) determining whether or not the element structures and physical models on which the electric characteristics have been calculated wholly cover the semiconductor element.